17.7 A 12mW 10GHz FMCW PLL Based on an Integrating DAC with 90kHz rms Frequency Error for 23MHz/µs Slope and 1.2GHz Chirp Bandwidth

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Authors: Pratap Tumkur Renukaswamy, Nereo Markulic, Sehoon Park, Anirudh Kankuppe, Qixian Shi, Piet Wambacq, Jan Craninckx

Journal title: 2020 IEEE International Solid- State Circuits Conference - (ISSCC)

Journal number: Period16/02/20 → 20/02/20

Journal publisher: IEEE

Published year: 2020

Published pages: 278-280

DOI identifier: 10.1109/isscc19947.2020.9063080

ISBN: 978-1-7281-3205-1