Towards Fault Simulation at Mixed Register-Transfer/Gate-Level Models

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Authors: E. Kaja, N.Gerlin, M. Vaddeboina, L. Rivas, S. Prebeck, Z. Han, K. Devarajegowda, W. Ecker

Journal publisher: IEEE

Published year: 2021

DOI identifier: 10.1109/dft52944.2021.9568310

ISBN: 978-1-6654-1609-2