Vertically stacked gate-all-around Si nanowire transistors: key process optimizations and ring oscillator demonstration

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Authors: Mertens, H.; Ritzenthaler, R.; Pena, V.; Santoro, G.; Kenis, K.; Schulze, A.; Dentoni Litta, E.; Chew, S.; Devriendt, K.; Chiarella, T.; Demuynck, S.; Yakimets, D.; Jang, D.; Spessot, A.; Eneman, G.; Dangol, A.; Lagrain, P.; Bender, H.; Sun, S.; Korolik, M.; Kioussis, D.; Kim, M.; Bu, K.; Chen, S.; Cogorno, M.; Devrajan, J.; Machillot, J.; Yoshida, N.; Kim, N.; Barla, K.; Mocuta, D. and Horiguchi,

Journal publisher: IEEE International Electron Devices Meeting - IEDM

Published year: 2017