A million wafer, virtual fabrication approach to determine process capability requirements for an industry-standard 5nm BEOL two-level metal flow

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Authors: W. F. Clark, A. Juncker, E. Paladugu, D. Fried, C. J. Wilson, G. Pourtois, M. Gallagher, A. De Jamblinne, D. Piumi, J. Boemmels, Z. S. Tokei, D. Mocuta

Journal title: 2016 International Conference on Simulation of Semiconductor Processes and Devices (SISPAD)

Journal publisher: IEEE

Published year: 2016

Published pages: 43-46

DOI identifier: 10.1109/SISPAD.2016.7605144

ISBN: 978-1-5090-0818-6