Design / technology co-optimization of strain-induced layout effects in 14nm UTBB-FDSOI CMOS: Enablement and assessment of continuous-RX designs

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Authors: R. Berthelon, F. Andrieu, E. Josse, R. Bingert, O. Weber, E. Serret, A. Aurand, S. Delmedico, V. Farys, C. Bernicot, E. Bechet, E. Bernard, T. Poiroux, D. Rideau, P. Scheer, E. Baylac, P. Perreau, M.A. Jaud, J. Lacord, E. Petitprez, A. Pofelski, S. Ortolland, P. Sardin, D. Dutartre, A. Claverie, M. Vinet, J.C. Marin, M. Haond

Journal title: 2016 IEEE Symposium on VLSI Technology

Journal publisher: IEEE

Published year: 2016

Published pages: 1-2

DOI identifier: 10.1109/VLSIT.2016.7573425

ISBN: 978-1-5090-0638-0