Interest of SiCO low k=4.5 spacer deposited at low temperature (400°C) in the perspective of 3D VLSI integration

This is a publication. If there is no link to the publication on this page, you can try the pre-formated search via the search engines listed on this page.

Authors: D. Benoit, J. Mazurier, B. Varadarajan, S. Chhun, S. Lagrasta, C. Gaumer, D. Galpin, C. Fenouillet-Beranger, D. Vo-Thanh, D. Barge, R. Duru, R. Beneyton, B. Gong, N. Sun, N. Chauvet, P. Ruault, D. Winandy, B. van Schravendijk, P. Meijer, O. Hinsinger

Journal title: 2015 IEEE International Electron Devices Meeting (IEDM)

Journal publisher: IEEE

Published year: 2015

Published pages: 8.6.1-8.6.4

DOI identifier: 10.1109/IEDM.2015.7409656

ISBN: 978-1-4673-9894-7