A digital delay line with coarse/fine tuning through gate/body biasing in 28nm FDSOI

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Authors: Ilias Sourikopoulos, Antoine Frappe, Andreia Cathelin, Laurent Clavier, Andreas Kaiser

Journal title: ESSCIRC Conference 2016: 42nd European Solid-State Circuits Conference

Journal publisher: IEEE

Published year: 2016

Published pages: 145-148

DOI identifier: 10.1109/ESSCIRC.2016.7598263

ISBN: 978-1-5090-2972-3