Body biasing for analog design: Practical experiences in 22 nm FD-SOI

This is a publication. If there is no link to the publication on this page, you can try the pre-formated search via the search engines listed on this page.

Authors: Sunil Satish Rao, Benjamin Prautsch, Ashish Shrivastava, Torsten Reich

Journal title: 2017 IEEE 20th International Symposium on Design and Diagnostics of Electronic Circuits & Systems (DDECS)

Journal number: annually

Journal publisher: IEEE

Published year: 2017

Published pages: 73-78

DOI identifier: 10.1109/DDECS.2017.7934580

ISBN: 978-1-5386-0472-4