35.2 A 0.021mm 2 PVT-Aware Digital-Flow-Compatible Adaptive Back-Biasing Regulator with Scalable Drivers Achieving 450% Frequency Boosting and 30% Power Reduction in 22nm FDSOI Technology

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Authors: Yasser Moursy, Thiago Raupp Da Rosa, Lionel Jure, Anthony Quelen, Sebastien Genevey, Lionel Pierrefeu, Emmanuel Grand, Joerg Winkler, Jonathan Park, Gael Pillonnet, Vincent Huard, Andrea Bonzo, Philippe Flatresse

Journal title: 2021 IEEE International Solid- State Circuits Conference (ISSCC)

Journal publisher: IEEE

Published year: 2021

Published pages: 492-494

DOI identifier: 10.1109/isscc42613.2021.9365782

ISBN: 978-1-7281-9549-0