Localized STRASS Technique on Advanced FDSOI Platform: Highly Tensile Si Demonstration for Dual Strain CMOS Integration
Project: WAYTOGO FAST
Updated at: 29-04-2024
Resources
5627 items found
“Investigation of Hot Carrier reliability of SOI and sSOI transistors using Back Bias”
Project: WAYTOGO FAST
Updated at: 29-04-2024
“P-FET Co-Integration on Si and Strained SiGe Dual Channel Substrates Obtained by Ge Local Enrichment Technique”
Project: WAYTOGO FAST
Updated at: 29-04-2024
“High Mobility Materials on Insulator for Advanced Technology Nodes”
Project: WAYTOGO FAST
Updated at: 29-04-2024
“Material and Device Innovation for Cost Effective CMOS Scaling Beyond 28nm”
Project: WAYTOGO FAST
Updated at: 29-04-2024
“Beyond Silicon CMOS: Progress and challenges”
Project: WAYTOGO FAST
Updated at: 29-04-2024
“Substrate maturity+D61:M61+D61:M61 and readiness in large volume to support mass adoption of ULP FDSOI platforms”
Project: WAYTOGO FAST
Updated at: 29-04-2024
“Designing with FD-SOI Technologies”
Project: WAYTOGO FAST
Updated at: 29-04-2024
“Designing with FD-SOI“ & “Interconnected World”.
Project: WAYTOGO FAST
Updated at: 29-04-2024
“How innovation and eco-system in Europe can enable future requirements in automotive electronics”
Project: WAYTOGO FAST
Updated at: 29-04-2024
Using Electron Diffraction Techniques, CBED and N-PED to measure Strain with High Precision and High Spatial Resolution
Project: WAYTOGO FAST
Updated at: 29-04-2024
Characterization and modelling of layout effects in SiGe channel pMOSFETs from 14nm UTBB FDSOI technology
Project: WAYTOGO FAST
Updated at: 29-04-2024
Impact of the design layout on threshold voltage in SiGe channel UTBB-FDSOI pMOSFET
Project: WAYTOGO FAST
Updated at: 29-04-2024
Performance and layout effects of SiGe channel in 14nm UTBB FDSOI: SiGe-first vs. SiGe-last integration
Project: WAYTOGO FAST
Updated at: 29-04-2024
A novel dual isolation scheme for stress and back-bias maximum efficiency in FDSOI Technology
Project: WAYTOGO FAST
Updated at: 29-04-2024
Vertically stacked-NanoWires MOSFETs in a replacement metal gate process with inner spacer and SiGe source/drain
Project: WAYTOGO FAST
Updated at: 29-04-2024
Strain mapping of semiconductor specimens with nm-scale resolution in a transmission electron microscope
Project: WAYTOGO FAST
Updated at: 29-04-2024
Mechanical simulations of BOX creep for strained FDSOI
Project: WAYTOGO FAST
Updated at: 29-04-2024
In-line monitoring of strain distribution using high resolution X-ray Reciprocal space mapping into 20 nm SiGe pMOS
Project: WAYTOGO FAST
Updated at: 29-04-2024
Smart solutions for efficient dual strain integration for future FDSOI generations
Project: WAYTOGO FAST
Updated at: 29-04-2024
Impact of strain on access resistance in planar and nanowire CMOS devices
Project: WAYTOGO FAST
Updated at: 29-04-2024
Physical transport simulation for path-finding and device optimization
Project: WAYTOGO FAST
Updated at: 29-04-2024
Towards physics-based DTCO for performance of advanced technology nodes
Project: WAYTOGO FAST
Updated at: 29-04-2024